In this project, we will make measurements to verify that Kirchhoff's voltage law is satisfied for some relatively arbitrary circuit.
Kirchhoff's voltage law (KVL) tells us that the sum of the voltage differences around any closed loop in a circuit is zero. More detail relative to Kirchhoff's important laws are provided in the links to the right.
We will also use this project to gain some experience with the passive sign convention. The passive sign convention tells us that, for passive circuit elements, we must assume a consistent voltage polarity and current direction: positive current must be assumed to enter the positive voltage terminal. Although the passive sign convention won't become terribly important to us until we start applying voltage-current relations for circuit elements, we should start using it now in order to avoid confusion later.
Qty | Description | Typical Image | Schematic Symbol | Breadboard Image |
---|---|---|---|---|
3 | Resistors with red as the third color band
(They will be in the 1kΩ to 9.9kΩ range) |
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Use V+ to implement the voltage source.
Connect resistors as shown.
Write KVL around loops 1 and 2, as indicated on the schematic to the right. Use the given reference voltage polarities. Your equations should look something like this:
Use a voltmeter to measure the voltages V1 , V2 , and V3 shown on the schematic. Make your measurements to be consistent with the given reference directions.
Substitute your measured voltages from part 1 into the KVL equations you determined in section B. Verify that KVL is satisfied for both of the loops.
Exchange any of the resistors for a resistor with a different value (as long as it has a red third color band) and verify that KVL is still obeyed.
Change the 5V voltage source for a -3V source. (You will have to use the AWG to apply the voltage.) Verify that KVL still works.
Change the reference polarity of the voltage V1 in part B. Re-write KVL around loop 1 to reflect this change. Re-measure the voltage V1 and verify that KVL is still obeyed.
We've added a third loop in the circuit below. Write KVL around loop 3 using the given reference polarity and verify that KVL is satisfied.