Project 5, Exercise 1

Project 4, Exercise 1

Logic Minimization


This Exercise is based on the material covered in Real Digital Project 5, which can be found in the red tab to the right. A downloadable document for this exercise is available in the orange tab to the right. The mention of grading within the downloadable document is due to the exercise material being used as course work for an electrical engineering class at a university.

Before beginning this exercise, you should…
  • Be familiar with the structure of logic circuits.
  • Know how to use the WebPACK™ schematic tools to enter and simulate circuits.
  • Know how to download circuits to the Digilent circuit board.
  • Understand logic systems and minimization techniques.
After completing this exercise, you should…
  • Be able to enter a VHDL description of a combinational logic circuit.
  • Be able to synthesize, simulate, and download a VHDL-based circuit.
  • Be able to implement any given combinational circuit using the Xilinx® ISE® schematic editor.
  • Understand the role of VHDL and circuit synthesizers, and the difference between structural and behavioral designs.
This exercise requires:
  • A Windows PC running the Xilinx ISE/WebPACK software
  • The Xilinx ISE/WebPACK software.
  • A Digilent circuit board

Problem 1.

Write the following equations in logic assignment (VHDL) form.

Problem 2.

Write VHDL statements to define circuits with the behavior defined by the truth tables below.

Problem 3.

Write VHDL statements to define circuits with the behavior defined by the equations below.

Problem 4.

F is a three-bit std_logic bus. Write VHDL to define the bits of F according to the equations:

Problem 5.

Write VHDL statements to define circuits with the behavior defined by the schematics below.

Problem 6.

Six judges are scoring a particular event, and they need a device to help them decide how well the event is received. Each judge has a single switch that they can use to enter a “like” or “dislike” vote (assume a switch outputs a '1' for “like”). Use VHDL to define a circuit that can indicate three separate conditions: A “strong majority like” of either 5 or 6 “good” votes; a “majority like” of 4 or “good” votes, and a “minority like” of exactly 3 “good” votes.

Problem 7.

A thermometer produces a continuously varying voltage signal between 0V and 5V, where 0V represents 0 degrees, and 5V represents 100 degrees. The signal is fed to an analog-to-digital converter (ADC). The ADC produces an 8-bit binary number that is directly proportional to the temperature—“00000000” represents 0 degrees, each increasing binary number from “00000000” represents a temperature increase of 100/256 degrees, and “11111111” represents 100 degrees. Use VHDL to define a circuit that outputs a logic high signal whenever the temperature is between 50 and 60 degrees.

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