# Project 7, Exercise 2

## Overview

This Exercise is based on the material covered in Real Digital Project 7, which can be found in the red tab to the right. A downloadable document for this exercise is available in the orange tab to the right. The mention of grading within the downloadable document is due to the exercise material being used as course work for an electrical engineering class at a university.

##### Before beginning this exercise, you shouldâ€¦
• Be able to add, subtract, and multiply binary numbers.
• Be able to enter and simulate circuits using schematic and VHDL methods in the Xilinx® ISE®/WebPACK™ tool.
• Be familiar with design of basic combinational circuit blocks.
##### After completing this exercise, you shouldâ€¦
• Know how to design circuits using structural VHDL methods.
• Know how to use these circuits in the solution of larger problems.
• Know when and how to apply the bit-slice design method.
• Understand how comparators, adders, subtractors, and multipliers work, and be able to design them using schematics or VHDL.
##### This exercise requires:
• A windows computer running Xilinx WebPACK tools.
• A Digilent circuit board.

#### Problem 1.

Design and simulate an 8-bit comparator using the WebPACK VHDL environment. (Hint: you may use behavioral design methods).

#### Problem 2.

Design and simulate an 8-bit RCA using structural methods and the WebPACK VHDL environment (Hint: the FA and HA bit-slice modules can be designed as behavioral modules and used as components in a separate structural VHDL source file).

#### Problem 3.

Design and simulate an 8-bit CLA using structural VHDL methods.

#### Problem 4.

Use the Xilinx tools to design, simulate and implement a structural 4-bit adder/subtractor module. Download the design to the Digilent board, using four slide switches to set the A operand, four slide switches to set the B operand, and a pushbutton to select add or subtract. Use five LEDs for circuit output. Check enough cases to be sure your circuit works.

#### Extra Credit.

Display the output from problem 4 on a seven-segment digit.

#### Problem 5.

Design an underflow/overflow detect circuit that does not need to access the carry-in signal to the most-significant bit, and add that circuit to your design from problem 4. Drive an LED to show when an output is in error.

#### Problem 6.

Using your HA, FA, and 8-bit CLA components, implement a 4-bit multiplier using the Xilinx tools. Simulate the multiplier using several representative cases stored in a test bench waveform file. Implement the multiplier in the Digilent board using the eight slide switches as inputs (four switches per input) and the eight LED's as outputs.

#### Problem 7.

Design and implement a 4-bit ALU using the Xilinx VHDL tools and the Digilent board. The ALU must perform the operations shown in the operation table presented in Real Digital Project 7. Assign inputs to slide switches and pushbuttons as you see fit, and assign outputs to LEDs or the seven-segment display.