Digital Circuits and the Basys Board

Project 1, Exercise 1

This Exercise is based on the material covered in Real Digital Project 1.

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Signal Propagation Delays

Real Digital Project 8

This module considers the time-course of logic signals as they pass through logic circuits. Until now, we have not considered the time required for logic signals to propagate through logic gates and along signal wires.

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Basic Memory Circuits

Real Digital Project 9

This project introduces the concept of electronic memory. Memory circuits function by storing the voltage present on an input signal whenever they are triggered by a control signal, and they retain that stored voltage until the next assertion of the control (or trigger) signal.

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Introduction to Digilent FPGA-based Boards

Project 2, Exercise 1

This exercise is based off of the material from Read Digital Project 2. There is a link available to download the PDF of the exercise.

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Board Verification and Basic Logic Circuits

Project 2, Exercise 2

This exercise is based off of the material from Real Digital Project 2. You will download a .bit file to your board to configure the FPGA with eight different logic circuits. The circuits use buttons and switches for inputs, and LEDs for outputs. You must probe the logic circuits by applying all possible combinations of input signals, and from the results write logic equations that describe the circuit’s behavior.

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Structural Design of Sequential Circuits

Real Digital Project 10

This project introduces the founding concepts used in the design of sequential circuits.

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Logic Circuit Structure

Project 3, Exercise 1

This Exercise is based on the material covered in Real Digital Project 3.

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Introduction to Schematic Capture

Project 3, Exercise 2

This exercise introduces the Xilinx ISE/WebPACK schematic capture and simulation tools. A few basic designs are presented as vehicles to illustrate tool use. This exercise is based off of the material presented in Real Digital Project 3.

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Logic Minimization

Project 4, Exercise 1

This Exercise is based on the material covered in Real Digital Project 4.

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Logic Minimization

Project 4, Exercise 2

This project exercise presents several worded problems that serve as behavioral specifications for digital circuits. Your job is to design, simulate, and download those circuits to your board. The topics from this exercise are based off of the material presented in Real Digital Project 4.

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VHDL

Project 5, Exercise 1

This exercise is based off of the material presented in Real Digital Project 5.

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Introduction to VHDL

Project 5, Exercise 2

This exercise is based off of the material presented in Real Digital Project 5.

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Combinational Circuit Blocks

Project 6, Exercise 1

This Exercise is based on the material covered in Real Digital Project 6.

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Combinational Circuit Blocks

Project 6, Exercise 2

This Exercise is based on the material covered in Real Digital Project 6.

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Combinational Arithmetic Circuits

Project 7, Exercise 1

This Exercise is based on the material covered in Real Digital Project 7.

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Combinational Arithmetic Circuits

Project 7, Exercise 2

This Exercise is based on the material covered in Real Digital Project 7.

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Signal Propagation Delays

Project 8, Exercise 1

This exercise is based off of the material presented in Real Digital Project 8.

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Basic Memory Circuits

Project 9, Exercise 1

This exercise is based off of the material from Real Digital Project 9.

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Structural Design of Sequential Circuits

Project 10, Exercise 1

This exercise is based off of the material from Real Digital Project 10.

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Structural Design of Sequential Circuits

Project 10, Exercise 2

This exercise is based off of the material from Real Digital Project 10.

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Getting Started with FPGA

Vivado Project 1: Introduction to Vivado

This project sets up your FPGA board for use with Xilinx® Vivado™ and shows you the steps in starting project files. This is a starter project with very little hands-on work with your board, but it is a good reference if you ever forget how to start your projects.

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Switch Controlled LEDs

Vivado Project 2: Use Switches to Control LEDs

In this project, you will design and implement a circuit that controls an LED on your FPGA board with a slide switch. This project demonstrates how to use Verilog HDL to design a digital circuit and implement it on an FPGA board.

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Design Simple Logic Circuit

Vivado Project 3: Guess the Logic

In this project, you will download a bit file to your board to configure the FPGA with four different logic circuits. The circuits use buttons and switches for inputs, and LEDs for outputs. You must probe the logic circuits by applying all possible combinations of input signals. From the results of applying all possible combinations, you will be able to write logic equations that describe the circuits' behaviors. You will then rewrite the equations using Verilog HDL and re-implement them on FPGA and compare the circuit behavior with the given bit-file.

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Simple Combinational Circuit Design

Vivado Project 4: Majority of Five

How could you find a majority of the vote if each voter of five has a switch to vote for yes or no? The logic is fairly simple and will be used in this project. Any time there are three or more of the five who vote yes, then there is a majority and the LED needs to turn on.

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