Describe Combinational Logic Behaviorally

Project 5: Multiplexer, Decoder, Encoder, and Shifter

In this project, you will design a multiplexer, a decoder, an encoder, and a shifter using Verilog HDL. Instead of building the circuit using logic operators, you will learn to describe a circuit behaviorally according to the functionality you wish the circuit to perform.

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Hierarchical Design in Verilog

Project 6: A Simple Communication System

In this project, you will design a 4-to-1 Mux and a decoder with an enable signal as a De-Mux to implement a simple serial data transmitter. Both Mux and De-mux will be implemented in two Verilog files for future re-use. Another Verilog file will be used to wrap up the Mux and De-Mux to form a communication sytem. This hierarchical design methodology will help manage design complexity, promote design reuse, and allow parallel development.

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Simulate Glitch and Delay

Project 7: Simulate Glitch and Delay in Combinational Circuits

In this project, we are going to examine the delay in combinational circuits. We are going to tell the simulator of the delay of each gate in Verilog and simulate the circuits to see how delay can affect the behavior of a combinational circuit.

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Project 8: Simulate SR-Latch

Latches are the fundamental bi-stable memory circuit in digital systems to store data and indicate the state of the system. In this project, we are going to implement and simulate the basic NAND cell of an SR-Latch and see how it functions.

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Use Flip-Flops to Build a Clock Divider

Project 9: Blinking LEDs

Flip-flop is an edge-triggered memory circuit. In this project, we will implement a flip-flop behaviorally using Verilog, and use a bunch of flip-flops to implement a clock divider that blinks the LEDs.

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Design Arithmetic Circuits

Project 10: Comparator, Adder, Multiplier, and ALU

In this project, we will design the arithmetic circuits in FPGA. We will build a 4-bit magnitude comparators, a ripple-carry adder, and a multiplier circuit. You can challenge yourself by integrating all those circuits together with some multiplexer to build an arithmetic logic unit (ALU).

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Counter and Clock Divider

Project 11: Counter and Clock Divider Revisit

A lot of interesting things can be built by combining arithmetic circuits and sequential elements. In this project, we are going to provide arithmetic circuits with timing reference by integrating arithmetic circuits with flip-flops. In the first part, we are going to use an adder with a register file (an array of flip-flops) to implement a counter that increase the number by 1 when rising edge of the clock arrives. In the second part, we are going to revisit clock divider and implement a clock divider whose frequency can be more precisely calculated compared to the clock divider that we implemented in the previous projects.

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State Machine

Project 12: Serial Adder

In this project, we are going to design a serial adder. Serial Adder is a circuit that performs binary addition bit by bit, i.e. instead of presenting both operands at the inputs of an adder at the same time, the operands are fed into the serial adder bit by bit and generates the answer on the fly. To design such a circuit, we are going to use the state diagram as the formalism to describe the behavior of the circuit, and then translate the state diagram into Verilog code.

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Control Seven Segment Display with Push Buttons

Design Challenge 1

In this challenge you will be asked to use push buttons to control the seven segment display on your FPGA board. Each digit of the seven segment display is composed of 7 LEDs arranged in a "figure 8" pattern with another LED for the decimal point. When the buttons are not pressed, all LEDs should be on. When a button is pressed, a digit should turn off.

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Control Light with Multiple Switches

Design Challenge 2

In this challenge you will be asked to control a single light with multiple switches. An LED on-board is used to emulate the light, and 4 slide switches are used to emulate the switches.

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Temperature Indicator

Design Challenge 3

In this challenge you will be asked to build and minimize a combinational circuit using K-Map that outputs a signal when temperature is in a specific range.

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Seven Segment Display Controller

Design Challenge 4

In this design challenge, you are going to finish a seven-segment decoder circuit that can can drive the 4-digit 7sd device on the Digilent board. We will take a hierarchical design approach to this problem, and the modules you designed in this design challenge will be reused in other projects as well.

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Shift Registers

Design Challenge 5

In this design, you are going to use a chain of flip-flop to implement a shifter register. The shifter register will be clocked using the clock divider you build in previous projects.

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VGA Display Controller

Design Challenge 6

In this design, you are going to be asked to do a VGA Controller to display something on your monitor. Actually, VGA controller is a quite simple design which only requires two counters and several comparators.

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Stop Watch

Design Challenge 7

In this design challenge, you are going to be asked to put combinational circuit, sequential circuits and state machine together and design a stop watch on the FPGA board.

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Data Selectors

An in-depth examination of data selectors, or more commonly called multiplexers (or simply muxes).

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Binary Decoders


An in-depth examination of binary decoders and demultiplexers.

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Priority Encoder

An encoder essentially performs the reverse of a decoder function in a combinational logic circuit. The process of converting from symbols or numbers to coded format is called encoding. A priority encoder has a priority function which allows it to produce an output corresponding to the highest-order input.

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Seven-Segment Display

Seven-Segment displays (7sd) are typically used in watches, calculators, and instruments to display decimal data. By lighting up a specified pattern of 7 LEDs, this type of decoder can create numbers 0-9 for digital display.

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A shifter is a circuit that produces an N-bit output based on an N-bit data input and an M-bit control input, where the N output bits are place-shifted copies of the input bits, shifted some number of bits to the left or right as determined by the control inputs.

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Delay of Combinational Circuits

Propagation Delays

Time is required to process information in digital circuits. This processing time is divided between the less significant signal transmission time, and the more significant propagation delays associated with switching logic circuits. If not managed properly, propagation delays can result in logic circuits that run too slowly to meet their requirements, or that fail altogether.

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Propagation delays not only limit the speed at which a circuit can operate, they can also cause unexpected and unwanted transitions in outputs. These unwanted transitions, called “glitches”, result when an input signal changes state, provided the signal takes two or more paths through a circuit and one path has a longer delay than the other.

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Bit-Slice Design Approach

When designing circuits with bussed inputs that represent binary numbers, it is often easier to consider a circuit designed for a single pair of bits, rather than for the entire binary number. This method of analysis is called Bit-Slice.

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Ripple Carry Adder (RCA)

Adder circuits add two N-bit operands to produce an N-bit result and a carry out signal (the carry out is a '1' only when the addition result requires more than N bits).

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