In this project, we are going to design a serial adder. Serial Adder is a circuit that performs binary addition bit by bit, i.e. instead of presenting both operands at the inputs of an adder at the same time, the operands are fed into the serial adder bit by bit and generates the answer on the fly. To design such a circuit, we are going to use the state diagram as the formalism to describe the behavior of the circuit, and then translate the state diagram into Verilog code.
Adder circuits add two N-bit operands to produce an N-bit result and a carry out signal (the carry out is a '1' only when the addition result requires more than N bits).